MIPS P5600 CPU sets new record for embedded processing performance
Two months ago, I attended the Imagination Summit in Japan for the first time and was preparing to return to the UK after the event. While waiting at the airport, I saw a Nissan Motors billboard that read, "What if the man who ran the fastest in the world could be faster?" It sparked my curiosity and made me think about the potential of innovation.
A few weeks later, my engineering team sent me an email sharing exciting news: the MIPS P5600 achieved the number one spot in the CoreMark ranking with an impressive 5.6 CoreMark/MHz per CPU score. This is a major milestone and shows how fast the world's fastest single-threaded CPU can be.
This achievement wasn’t accidental. Just like Nissan’s pursuit of perfection, we’ve always aimed for excellence—especially when we’re already leading in the industry. The P5600 now holds the new record for the highest CoreMark score ever set by our award-winning MIPS proAptiv processor.
The result has been officially verified by EEMBC, a well-established organization responsible for designing and maintaining the CoreMark benchmark. You can find all the certified results on their website.
Upon closer inspection, we found that the MIPS P5600 delivers up to 20% better performance than its direct competitors while using less area. This makes it a game-changer for power-sensitive applications such as mobile devices, home entertainment systems, networking equipment, and automotive solutions.
The MIPS P5600 offers up to 20% higher raw performance in a smaller area, making it a powerful choice for developers and engineers.
Interestingly, the CoreMark/MHz score of the P5600 even surpasses some of Intel’s desktop CPUs. For example, the Intel Core i7-2640M at 2.8GHz achieves 14,513.79 CoreMark, which is 5.18 CoreMark/MHz—about 10% lower than the latest P5600 result.
Among all licensable CPUs, the MIPS P5600 has the highest and most proven CoreMark score. This level of performance efficiency will significantly enhance performance across various power-sensitive applications, including mobile, home entertainment, networking, and automotive systems.
Even more importantly, these results were achieved using both the latest and existing GCC compilers. Whether you're using a partner’s source code or Imagination’s SDK, all customers have access to this high-performance toolchain. Unlike some competitors who rely on expensive, closed toolchains to achieve top scores, Imagination focuses on building an open ecosystem that speeds up development and reduces time-to-market for embedded and mobile applications.
Introducing the MIPS P5600
The P5600 is part of the MIPS Warrior P-class processor family, designed to deliver ultimate performance for mobile and embedded applications. It features a powerful, feature-rich microarchitecture that pushes the boundaries of what a 32-bit CPU can do.
Key Features of the MIPS P5600:
- Fast 128-bit SIMD Engine: Accelerates multimedia processing and other matrix-based operations.
- Complete Hardware Virtualization: Supports multiple fully independent, parallel-running operating systems.
- Enhanced Security: Enables support for multiple Trusted Execution Environments (TEEs) on a single CPU, ideal for consumer and enterprise applications.
- Advanced Branch Prediction: Optimizes performance with efficient instruction execution.
- Instruction Bonding: Doubles performance for memory-intensive data movement tasks.
- Extended Virtual Addressing (EVA): Offers more flexible use of virtual address space for efficient memory management.
- Extended Physical Addressing (XPA): Supports up to 1TB of memory capacity (40-bit addressing).
The P5600 is also one of our third-generation multi-issue, out-of-order, fully synthesizable processors. Below is a visual representation of the long evolution of high-performance MIPS CPUs, from the 74K and proAptiv to today’s P5600.
Evolution of High-End 32-bit MIPS CPUs
The P5600 brings several improvements over the previous generation of proAptiv CPUs, including enhanced fetch efficiency, reduced L2 cache latency, and improved pre-fetching capabilities. Additionally, cache replay and memory disambiguation have been optimized to boost real-world performance, such as in memory replication scenarios.
We are proud of the groundbreaking performance of the new MIPS Warrior CPU. This success stems from our long-term commitment to designing high-performance MIPS CPUs. Looking ahead, future developments in the instruction set architecture (such as Release 6), along with continuous innovations in the memory subsystem and microarchitecture, will further enhance this product and drive even better results.
By combining MIPS Warrior CPUs, PowerVR Multimedia IP, and Ensigma Connectivity IP, system engineers can develop cutting-edge embedded processors that deliver top-tier performance with lower power consumption and smaller form factors.
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