Innovative power component bus architecture improves electrical performance and enhances design flexibility
As the complexity of the system increases, the required power supply requirements continue to increase; increasing and decentralized voltages, faster load transients, and lower load voltages have forced designers to look for smaller packages and higher Efficiency and higher current density DC-DC converters, and need to be based on lower costs. However, current power products and corresponding structures have been applied beyond their inherent limits, and there are few places where they can continue to be improved, and the existing power system requirements can no longer be met.
An innovative power conversion approach has been developed by Vicor, called the "particulated power architecture" - the Factorized Power Architecture (FPA), which mobilized the basic power conversion function in "Distributed Power Architecture (DPA)" - voltage Change, regulation and isolation. The related new power components are called "V.I - Chips" (V.I - Chips). These "V.I - Chips" have unprecedented speed, power density, and efficiency, enabling the performance of power systems in electrical appliances, costs, and More benefit from reliability.
In traditional distributed power architectures based on "brick" components, isolation, voltage transitions, regulation, filtering, and input protection are duplicated at each "load node (POL)". Another architecture is the "Intermediate Bus Architecture (IBA)", which is characterized by an isolated "brick" component or bus conversion module supplying a series of non-isolated load node DC-DC converters; Figure 1 compares IBA And FPA's function respectively.
Typically in the mid-bus architecture, from a stable DC voltage, for example 48V, to a "bus converter (IBC)", the IBC outputs an isolated buck voltage to midway power bus voltage, typically 12,8,5 Or 3V. At the load node, the voltage in the middle is further reduced to the final value. Here some non-isolated buck converter is used, ie "niPOL" converter; however, because niPOL has no isolation, this is Pressure-sensitive loads are more prone to failure, and systems are also prone to problems with ground loops.
On the contrary, "the split ratio power architecture (FPA)" moves the isolation function to the load node. As shown in Figure 1, the first module in the architecture is the "pre-stabilization module (PRM)", which regulates the input DC voltage and stabilizes the output. The bus that presses is called "the division ratio bus (Vf)", this non-isolated PRM efficiency is up to 99%.
Since the PRM is free to output "VF" voltage higher than that of the IBA system (because of the isolation function at the back), the voltage distribution distribution has lower I2R loss, indicating that the PRM can be far away from some load point, even It is also possible to put it on another circuit board.
The converter at the point of load is called the "Voltage Transition Module (VTM)". This VTM bucks or boosts the regulated but non-isolated PRM output and provides micro-galvanic isolation. The output voltage is determined by its K ratio:
VOUT = K · VIN, VTM efficiency up to 97%, with good dynamic response and noise characteristics. For example, in a 90% load step at 50A/ç¥, the VTM can respond within 200ns and accumulate within 1ç¥, which is fast enough. Therefore, for some microprocessors, the designer can consider using PRM- The VTM combination replaces the standard voltage regulator module solution to remove a large number of high-cost, easily damaged load-side capacitors.
The VTM is based on a zero-voltage and zero-current switching topology, which explains VTM's ability to limit common-mode and differential-mode noise at the point of load. For example, a 48V to 12V VTM output with a ceramic bypass capacitor of only 12mVpp high-frequency ripple, or just 0.1% of the output DC, far exceeds the performance of a traditional DC-DC converter.
Because of the low output impedance of the VTM (which is approximately 1mΩ at low output voltages), the load regulation of the VTM is only +/- 4% even in open-loop mode. The output of the VTM can be returned to The PRM performs dead-loop operations to improve the load regulation, which is only a few percent of the load regulation.
During dead-loop operation, the PRM reacts to the load and regulates the output Vf, up or down to compensate for the output impedance effect of the VTM (usually +/- 4%). In the case where multiple outputs are required, a single PRM can drive multiple VTMs and each VTM can have a different voltage transition ratio; multiple PRM and VTM combinations can also be paired and each combination acts as an independent voltage regulator.
One example is to connect two VTMs to one PRM (see Figure 2). The VTM connects to the most tightly regulated load and provides feedback to the PRM. In this example, the VTM provides the tight regulation required by load 1, and the other VTM operates in dual output mode, which can output a 4% load regulation voltage regulation. Voltage to load 2 and load 3. Although not every application can be implemented in this way, this example still shows the flexibility of FPA. It can be said that designers need not reluctantly use high-cost, full-featured DC-DC converters for each load voltage output if not necessary.
As mentioned earlier, one of the main advantages of using "Frequency Ratio Architecture (FPA)" is that the "Variable Ratio Bus (Vf)" can be a converter with a higher voltage point of load, ie VTM, which can be far away from the PRM. It can even be placed on another separate circuit board, which is a great advantage for FPA design.
However, the better place is that both PRM and VTM are "Ball Grid Array (BGA)" packaged devices, called "V.I-chips", which are compatible with standard surface mount manufacturing processes. The "V·I - chip" built into the board is only 4mm high. Everyone can compare a perforated 1/4 brick module placed on a circuit board. Its height is 12.7mm.
However, it does not sacrifice power for small size. A two-chip combination (single PRM and single VTM) can achieve a horizontal power density of 500 W/in3. At the load node, the power density is greater than 1000 W/in3, which is equivalent to nearly 500 A. The current density of /in3.
Comparing traditional quarter-brick DC-DC converters, the PRM-VTM dual-chip is smaller, the 3.3V output is 60A, and the 1/4 brick 3.3V output is typically 50A (165W). At 2.5V, the PRM-VTM combination can reach 80A, while the current quarter-brick converter can only reach 60A.
In short: Reconfigure power conversion functions (voltage transition, regulation, and isolation functions) and present these functions from the "BGA package" "V.I-chip" to form a "Frequency Ratio Power Architecture (FPA)". The architecture significantly enhances the performance of the power system, improves reliability, and increases design flexibility while reducing costs.
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