Design of Communication Software for 51 Compatible Carrier Communication Microcontroller PL3105

Abstract: The PL3105 chip is a dedicated SoC chip designed for smart meters. It has powerful functions such as 8051 instruction-compatible high-speed microprocessor and direct-sequence spread spectrum carrier communication. This paper introduces the main features of PL3105 and its carrier communication principle, and analyzes the software design method for carrier communication applications.

introduction

With the rapid development of embedded systems and integrated circuit technologies, dedicated chips designed for smart meter applications have made great strides. Smart meters generally need to have CPU unit, display unit, standard industrial bus interface, A/D signal conversion, real clock, watchdog and other functions. After selecting the CPU, the traditional smart meter device needs to configure complex function chips and interface chips to complete display driver, external program storage, data storage and other required functions. Numerous interface chips result in large size, high cost, increased power consumption, and reduced reliability of the instrument; it is difficult to debug and maintain at the same time.

In order to meet the application needs of smart meters, the system-on-system SoC (System on Chip) solution for a certain type of product has gained tremendous development opportunities. IC design companies at home and abroad have launched their own SoC products for different fields and different application needs. The PL3105 SoC product with 8051 instruction-compatible high-speed microprocessors is manufactured using the latest CMOS digital/analog hybrid process and is a low-cost, high-performance solution for smart meter industry applications.

1 Main features of PL3105

Using 8051 instruction-compatible high-speed microprocessor, the software is easy to develop; it has 8/16-bit dual-mode ALU and 8x speed in standard 51. It runs fast and has strong data processing capability. Figure 1 is a block diagram showing the basic functional structure of the PL3105.

For smart meter applications, the PL3105 integrates 2-channel 16-bit precision ∑-Δ modulation A/D, LED (8 & TImes; 8 stroke type) / LCD (24 & TImes; 4 stroke type) display driver module, 2 UART, built-in 1KB of RAM and 16KB of E2PROM program memory (programmed by ISP); built-in low-power real-time clock. At the same time, integrated voltage monitoring, power-on, power-down reset, and watchdog circuits are integrated to ensure the reliability of the system during operation in an industrial environment.

The embedded carrier communication control unit enables the product to have the powerful function of networking and remote communication on the low-voltage power line; the upgrade of the lowest-voltage power line carrier communication interface dedicated chip PL2101, with strong anti-in-band co-channel interference capability and high sensitivity advantage. The embedded CPU realizes the control of carrier communication through the configuration register, and has better interface and higher reliability than the PL2101 chip.

2 How carrier communication works

Carrier communication uses BPSK (Bipolar Phase Shift Keying) modulation and demodulation method: the information to be transmitted is spread to a frequency band with a pseudo-random code sequence, and the same pseudo-random code sequence is used for synchronization at the receiving end. Receive and recover information. The process of reception includes the capture and synchronization of carrier signals.

The acquisition is that the receiving module searches for the received signal before the spread spectrum sequence is accurately synchronized, so that the spread spectrum sequence of the received signal and the local spread spectrum sequence enter the synchronizable range in phase, that is, the phases of the two are in a spread spectrum sequence. Within the symbol. With a serial integral search method with a sliding step of half a bit, the theoretical maximum capture time requires 29 data bits (15-bit PN code). After the capture is completed, the tracking phase is entered, and the clock rate of the local pseudo-code generator is dynamically increased, so that the local pseudo-code can be automatically synchronized with the pseudo-code of the received signal. The tracking circuit of the spreading sequence uses an all-digital baseband delay locked loop circuit.

The despreading process can be completed to ensure that both the acquisition and the synchronization are completed. The transmitting module transmits at least 40 bits of all "1"s before each transmission of valid data, and is used for capture and the same training (15-bit PN code).

Since the selected spread spectrum pseudo code has strong autocorrelation, it is determined whether to stop the sliding of the pseudo code and complete the capture by comparing the correlation between the local pseudo code and the received sequence with the set threshold. At 500bps, the default capture threshold is 30H. The spread spectrum and despreading work of carrier communication is completely realized by the hardware circuit inside the SoC, which is simple and reliable, and the despreading threshold can be adjusted by software.

Figure 2 (a), (b) is the carrier communication transmission / reception operation timing diagram inside the PL3105, the transmission and reception data bits are connected to P3.7 inside the chip, and the chip is not packaged and led out.

The carrier communication controller adopts frame synchronous serial shift communication, half-duplex mode, and the rate is 500bps/250bps; the center frequency is 120kHz and the bandwidth is ±7.5kHz. The embedded CPU uses external interrupt 2 (INT2), synchronous transceiver interrupt, and the carrier communication configuration flow is shown in Figure 3.

1 Enable INT2 interrupt (EX2 = 1), and it is the falling edge trigger mode (IT2 = 0).

2 Enable carrier communication control bit PLM_SSC (EXT_CFG.0 = 1, INT2 is used as an interrupt for the carrier communication synchronization signal.

When the carrier-transmitting control bit PLM_RS (EXT_CTRL.0)=1, the carrier controller is in the transmitting state; when PLM_RS (EXT_CTRL.0)=0, the carrier controller is in the receiving state.

4 carrier transmission reset register: used to prevent the carrier communication module from being in the transmission state for a long time, so that the entire communication system is in an out of control state. It is a 13-bit counter. When the status is transmitted, the counter is decremented. After decrementing to 0, the carrier transmission mode is forcibly returned to the receiving state; when receiving the state, the counter stops working. When sending data for a long time, you need to write "A2H" to the PLM_RST register. After writing, the counter is automatically reset and keeps transmitting.

The structural block diagram of the low-voltage power line carrier communication is shown in Figure 4. It needs to cooperate with peripheral power amplification and receiving loop work. The distance of carrier communication is closely related to the advantages and disadvantages of peripheral circuit design and power.

3 Receive and send software design

Carrier communication is a bus mode communication, so the normal state of the carrier module must be set to the receiving state, and different carrier modules must be assigned different communication addresses. After the module receives the correct command, only modules with the same address are allowed to respond according to the protocol. Since the carrier communication rate is much lower than the main frequency, in order to improve the CPU efficiency, the reception and transmission are generally designed as external interrupt processing; each time the interrupt is entered, the reception or transmission processing of 1-bit data is completed.

According to the flow shown in Figure 3, the module is configured and the selection rate is 500bps, and the internal automatically selects the 15-bit PN code. The carrier communication controller enters the receiving state to capture and synchronize the carrier signal.

At the time of reception, the acquisition and synchronization process is automatically performed by the hardware circuitry of the carrier communication control unit, without the need for software to participate. Since the power line crying always exists, the sync frame header must be added before the valid data, and 0x09 and 0xAF are selected according to the correlation criterion, and the subsequent valid data body and check byte are communicated.

Figure 5 is a block diagram of a carrier communication receiving process. After the carrier communication control unit despreads 1-bit data, an interrupt is generated. When receiving, the 16-bit receiving window and the 1-bit sliding mode are first used to receive the synchronized frame headers 0x09 and 0xAF of the communication. After the frame header is successfully received, the subsequent data is intercepted by one byte every 8 bits to obtain valid data for transmission. During the receiving process, address discrimination, length reception, and verification calculation are performed according to the relevant communication protocol. The module with the same address responds to the data conforming to the communication protocol and transfers to the transmitting state.

Figure 6 is a block diagram of a carrier communication transmission process. The calling party for carrier communication issues a command or a response from the recipient. When set to the carrier transmission state, the carrier communication control unit transmits 1 bit of spread spectrum data, automatically generates an interrupt, and allows the next data transmission. According to the capture and synchronization process, first send at least 40 bits of all "1"; then send the sync frame header 0x09, 0xAF bit by bit; then send the communication address, data length, data body, check according to the user's relevant communication protocol Wait for bytes.

After all the data is transmitted, the carrier module can be transferred to the receiving state. However, in order to ensure that the last bit of the data to be transmitted is successfully transmitted, the carrier transmission state must be converted to the receiving state after the last bit of data has been transmitted and wait until the next transmission interruption arrives.

The carrier is not sent. Before all data is sent, the CPU must write “A2H” to the PLM_RST register in time to reset the counter to prevent the automatic reset from entering the carrier receiving state. The send interrupt procedure is as follows:

Void PLM_int(void)interrupt 7//carrier transceiver interrupt

{if(PLM_RS==1)zb_tx();//carrier transmission interrupt service routine

Else zb_rx();//carrier receiving program service program, slightly

}

Void zb_tx(void)//carrier transmitter

{if(len8==0)s_byte=buf_send[zbs_count];//Get the send byte in place send buffer

ACC=s_byte;

P3.7=ACC^7;//bit transmission, the highest position is in front

S_byte=s_byte<<1; //left shift

Len8++; //shift count calculation

If(len8>7) //8 bits are sent

{zbs_count++; //Next byte

Len8=0; //shift count is cleared

}

PLM_RS=1; //carrier transmission allowed

PLM_RST=0xA2; //Carrier transmit reset register clear

}

Conclusion

The smart meter with carrier communication function designed by SoC chip PL3105 has been applied and promoted in the smart meter industry. Its simple receiving and transmitting processing method makes the application design very convenient. At the same time, the flexible ISP programming method makes the product upgrade and function expansion flexible; achieves low-cost, high-performance design indicators.

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